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Computer Systems Architecture

Status: Archived

Archived funding opportunity

This document has been archived.

Important information for proposers

All proposals must be submitted in accordance with the requirements specified in this funding opportunity and in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) that is in effect for the relevant due date to which the proposal is being submitted. It is the responsibility of the proposer to ensure that the proposal meets these requirements. Submitting a proposal prior to a specified deadline does not negate this requirement.

Synopsis

This program supports basic research on new computing systems and architectures.  Focus is on new architecture ideas and concepts that will form the basis for solving computing problems likely to arise in the future. Broadly speaking, this covers the design, implementation, and evaluation of novel computing structures and technologies.  Theoretical and small-scale experimental studies are supported, as are assessments of fault tolerance and performance.  Research on system software, when intimately connected to the architecture or hardware, is supported. Currently, special attention is given to research on:

 

Emerging Architectures: Molecular and nano architectures, quantum computing, and optical computing  systems.

 

Hardware-Software Co-Design: Reconfigurable architectures, co-simulation, synthesis, low power  design, and embedded systems.

 

Microarchitecture: compiler-architecture interaction, out-of-order execution, VLIW, instruction and data prefetching and prediction, speculation, superscalar processing, multithreading, embedded processor design, lower power architectures.

 

Metrics and parallelism: performance evaluation of single processor and multiprocessor architectures, analytical modeling, new measurement and simulation techniques, co-simulation, benchmarks for scientific and commercial system architectures.

 

Systems: latency reduction, interconnection networks, active networks, shared memory multiprocessors, workstation clusters, quality of service, fault-tolerance and reliability, and real-time communication.

 

Memory: new memory architectures, bandwidth, latency reduction, data prefetching and forwarding techniques, cache coherence and synchronization, memory hierarchy management, processor-in-memory, active memory, and memory management problems.

 

Input/Output: Disk organization, scheduling, data stream management, low-overhead protection, latency reduction, active disk, and high performance I/O design.

Program contacts

Velma Lawson
Program Specialist
vlawson@nsf.gov (703) 292-8910 MPS/DMR

Awards made through this program

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Map of recent awards made through this program