NSF 24-522: Enabling Access to the Semiconductor Chip Ecosystem for Design, Fabrication, and Training (Chip Design Hub)
Program Solicitation
Document Information
Document History
- Posted: December 29, 2023
Program Solicitation NSF 24-522
National Science Foundation |
Full Proposal Deadline(s) (due by 5 p.m. submitter's local time):
April 04, 2024
Important Information And Revision Notes
Any proposal submitted in response to this solicitation should be submitted in accordance with the NSF Proposal & Award Policies & Procedures Guide (PAPPG) that is in effect for the relevant due date to which the proposal is being submitted. The NSF PAPPG is regularly revised and it is the responsibility of the proposer to ensure that the proposal meets the requirements specified in this solicitation and the applicable version of the PAPPG. Submitting a proposal prior to a specified deadline does not negate this requirement.
Summary Of Program Requirements
General Information
Program Title:
Enabling Access to the Semiconductor Chip Ecosystem for Design, Fabrication, and Training (Chip Design Hub)
Synopsis of Program:
Integrated micro/nano-electronic circuits (ICs) are a foundational technology that enable advancements in artificial intelligence, 5G/6G communication, security, scientific computing, quantum computing, and more. The economic competitiveness, technological leadership, and national security of the United States depend on a future workforce at the forefront of IC design and fabrication, spanning IC researchers, IC designers, and IC fabrication engineers and technicians. Since IC design and fabrication must deal with staggering complexities to meet system functionality, performance, and energy objectives, offering students at all levels with hands-on experiences designing and fabricating IC chips is imperative.
The needs of research and education communities in this domain have been widely recognized by a range of reports, including those derived from NSF-sponsored workshops. Prospective PIs for this solicitation are encouraged to read the following reports:
- NSF Workshop on Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities (https://nsfedaworkshop.nd.edu/assets/432289/nsf20_eda_workshop_report.pdf)
- NSF Integrated Circuit Research, Education and Workforce Development Workshop (https://nsf-ic-education.com/NSF_IC_Workshop_Final_Report.pdf)
- NSF Workshop on CMOS+X Technologies (https://e3s-center.berkeley.edu/nsf-workshop-cmosx/cmos-x-report/)
In response to the urgent need for chip fabrication support in the academic community, NSF has invested in several new funding opportunities (e.g., Supplements for Access to Semiconductor Fabrication (ASF, https://new.nsf.gov/funding/opportunities/supplements-access-semiconductor-fabrication-asf), Partnership for Prototyping of CMOS+X Systems (CMOS+X, https://www.nsf.gov/publications/pub_summ.jsp?ods_key=nsf22076). Advanced Chip Engineering Design and Fabrication (ACED Fab, https://new.nsf.gov/funding/opportunities/advanced-chip-engineering-design-fabrication-aced). While these investments support chip fabrication by academic researchers, they do not address end-to-end semiconductor chip design. This solicitation fills that gap.
The aim of this solicitation is (i) to dramatically lower the barriers to accessing state-of-the-art electronic design automation (EDA) tools, process design kits (PDKs), and design intellectual property (IP) cores for students and academic researchers, and (ii) to enable students at various levels to design IC chips. A key goal is to broaden participation in IC chip design beyond the small number of institutions currently engaged in these activities.
This solicitation seeks proposals to establish and manage a community infrastructure that supports the entire IC chip design process beginning from behavior/structural description at the Register Transfer Level (RTL) or above to GDSII fabrication mask file generation. The infrastructure should provide licensing, access, and maintenance of (i) commercial and/or open-source EDA tools necessary for the end-to-end IC chip design and verification process, and (ii) design PDK/IPs at various CMOS technology nodes (potentially including emerging technologies), as well as support for multi-project-chip (MPC) integration. Further, proposals should include efforts to develop, curate, and host educational/tutorial materials on the entire IC chip design flow to help train the next generation of IC designers and researchers.
PIs interested in submitting a proposal to this program are strongly encouraged to discuss their plans with cognizant Program Officers.
Cognizant Program Officer(s):
Please note that the following information is current at the time of publishing. See program website for any updates to the points of contact.
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X. Sharon Hu, Program Director (CCF), telephone: (703) 292-8910, email: chip_hub@nsf.gov
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Sankar Basu, Program Director (CCF), telephone: (703) 292-7843, email: chip_hub@nsf.gov
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Jason O. Hallstrom, Program Director (CNS), telephone: (703)292-8950, email: chip_hub@nsf.gov
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Andrey Kanaev, Program Director (OAC), telephone: (703) 292-2841, email: chip_hub@nsf.gov
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Danella Zhao, Program Director (CCF), telephone: (703) 292-4434, email: chip_hub@nsf.gov
Applicable Catalog of Federal Domestic Assistance (CFDA) Number(s):
- 47.070 --- Computer and Information Science and Engineering
Award Information
Anticipated Type of Award: Cooperative Agreement
Estimated Number of Awards: 2
NSF expects to fund up to two Chip Design Hub awards under this program.
Anticipated Funding Amount: $10,000,000
The maximum size and duration of an award will be up to $1.6 million per year for up to 5 years.
Estimated program budget, number of awards and average award size/duration are subject to the availability of funds.
Eligibility Information
Who May Submit Proposals:
Proposals may only be submitted by the following:
- Non-profit, non-academic organizations: Independent museums, observatories, research laboratories, professional societies and similar organizations located in the U.S. that are directly associated with educational or research activities.
Institutions of Higher Education (IHEs) - Two- and four-year IHEs (including community colleges) accredited in, and having a campus located in the US, acting on behalf of their faculty members.
Who May Serve as PI:
By the date of submission, any PI or co-PI must hold either:
- a tenured or tenure-track position, or
- a primary, full-time, paid appointment in a research or teaching position
at a US-based campus of an organization eligible to submit to this solicitation (see above), with exceptions granted for family or medical leave, as determined by the submitting organization. Individuals at overseas branch campuses of US IHEs are not eligible. Individuals with primary appointments at for-profit non-academic organizations can serve as paid or unpaid Senior Personnel (i.e., not as PIs nor co-PIs).
Limit on Number of Proposals per Organization:
There are no restrictions or limits.
Limit on Number of Proposals per PI or co-PI: 1
In this competition, an individual may participate in at most one proposal as PI, co-PI, or Senior Personnel.
These eligibility constraints will be strictly enforced in order to treat everyone fairly and consistently. In the event that an individual exceeds this limit, proposals received within the limit will be accepted based on the earliest date and time of proposal submission (i.e., the first proposal received will be accepted and the remainder will be returned without review). No exceptions will be made.
Proposal Preparation and Submission Instructions
A. Proposal Preparation Instructions
- Letters of Intent: Not required
- Preliminary Proposal Submission: Not required
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Full Proposals:
- Full Proposals submitted via Research.gov: NSF Proposal and Award Policies and Procedures Guide (PAPPG) guidelines apply. The complete text of the PAPPG is available electronically on the NSF website at: https://www.nsf.gov/publications/pub_summ.jsp?ods_key=pappg.
- Full Proposals submitted via Grants.gov: NSF Grants.gov Application Guide: A Guide for the Preparation and Submission of NSF Applications via Grants.gov guidelines apply (Note: The NSF Grants.gov Application Guide is available on the Grants.gov website and on the NSF website at: https://www.nsf.gov/publications/pub_summ.jsp?ods_key=grantsgovguide).
B. Budgetary Information
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Cost Sharing Requirements:
Inclusion of voluntary committed cost sharing is prohibited.
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Indirect Cost (F&A) Limitations:
Not Applicable
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Other Budgetary Limitations:
Other budgetary limitations apply. Please see the full text of this solicitation for further information.
C. Due Dates
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Full Proposal Deadline(s) (due by 5 p.m. submitter's local time):
April 04, 2024
Proposal Review Information Criteria
Merit Review Criteria:
National Science Board approved criteria. Additional merit review criteria apply. Please see the full text of this solicitation for further information.
Award Administration Information
Award Conditions:
Additional award conditions apply. Please see the full text of this solicitation for further information.
Reporting Requirements:
Additional reporting requirements apply. Please see the full text of this solicitation for further information.
I. Introduction
Historically, the U.S. was the leader in IC chip design and fabrication education. Through the 1990s, many universities taught Very Large-Scale Integration (VLSI) design classes with large enrollments at the graduate or advanced undergraduate levels. Students in such classes were given opportunities to employ state-of-the-art electronic design automation (EDA) tools to design IC chips and to fabricate them through MOSIS, a multi-project wafer service. In recent years, the number of universities that offer such classes has drastically declined. Many factors contributed to this decline, including (i) the costs and challenges of installing and maintaining EDA tools, (ii) limited access to Process Design Kits (PDKs) and design Intellectual Property (IP) cores, (iii) complex legal processes to access commercial tools and advanced technology nodes, (iv) significant fabrication costs and limited shuttle space, and (v) lack of support in tool usage and educational materials. There is a dire need to address these issues in order to support semiconductor workforce development and maintain U.S. leadership in semiconductor technologies. Addressing these five challenges is the focus of this solicitation.
It is now well-recognized that enrollments have dropped in VLSI Design courses at most universities, and the fraction of students from underrepresented populations in these courses is close to zero at some institutions. MOSIS discontinued the 0.6-micron process long used for class projects and no longer provides educational funding. The cost of discounted VLSI EDA tools is significantly higher than other university software, and the cost per student increases as enrollments decline. Further, maintaining these tools and their computing infrastructure requires IT staffing and expertise, as well as dedicated computer systems for licensing and installation. Many universities are considering stopping the purchase of these academic licenses entirely. There is a critical need to address these factors in order to support semiconductor workforce development and maintain U.S. leadership in advanced semiconductor design.
One recent NSF-sponsored workshop (NSF Integrated Circuit Research, Education and Workforce Development Workshop, https://nsf-ic-education.com/NSF_IC_Workshop_Final_Report.pdf), observed that a national chip design center is needed to further research and education in IC design. This report also noted that access to this design center should not be limited to R1 universities, but should also include R2 universities, community colleges, and (where appropriate) high schools, to have the maximum impact. The report envisioned that the Chip Design Hub establishment should support the access and maintenance of IC design tools, tool flows, design kits, design components, and educational materials.
In response to the identified needs, this solicitation seeks proposals to establish and manage a community infrastructure that supports the entire IC chip design process, beginning from behavior/structural description at the Register Transfer Level (RTL) or above to GDSII fabrication mask file generation. The infrastructure should provide licensing, access, and maintenance of (i) commercial and/or open-source EDA tools necessary for the end-to-end IC chip design and verification process, and (ii) design PDK/IPs at various CMOS technology nodes (potentially including emerging technologies), as well as support for multi-project-chip (MPC) integration. Further, (iii) proposals should include efforts to develop, curate, and host an archive of educational/tutorial materials on the entire IC chip design flow to help train the next generation of IC designers and researchers.
Awards will be issued in FY 2024, up to $8 million per award, for up to five-years, commensurate with proposal scope and team size. While collaboration among multiple universities is strongly encouraged, a single proposal should be submitted by the lead organization. Support should be provided to collaborating organizations via subawards managed by the lead organization.
PIs who are interested in submitting a proposal to this program are strongly encouraged to discuss their plans with cognizant Program Officers.
II. Program Description
The goal of this solicitation is to dramatically lower the barriers to accessing state-of-the-art EDA tools, PDKs, and IP cores for students and academic researchers, and to enable students at various levels to design IC chips at various scales. A key objective is to broaden participation in IC chip design and contribute directly to semiconductor workforce development.
This solicitation seeks proposals to establish and manage community infrastructure that provides centralized access and support for IC chip design (a Chip Design Hub). A Chip Design Hub should support the licensing, access, and maintenance of IC design tools, tool flows, design kits, design components, and educational materials.
Successful Chip Design Hub projects will serve as centralized entities that provide cloud-based design enablement to universities and other educational institutions, including:
(1) EDA tools: EDA tool support is critical, yet most university programs do not provide this support or provide very limited support. A Chip Design Hub should provide access to end-to-end tool flows, complete with licenses and version requirements, as well as support to minimize EDA tool bugs and errors. One possible method would be to support a reference run script that utilizes a reference design. This reference script would demonstrate the essential commands for successful and accurate runs. Support (via the reference script and reference design) would help researchers and students learn the EDA process and reduce the need for supporting specific EDA errors due to setup, versioning, and misuse. For the highest accessibility, the reference tool flow and design should be open-sourced so that they may be shared, modified, and scaled to explore the design implementation space, and not be restricted from redistribution. Providing access to both EDA tools from multiple vendors and open-source tools is highly desirable. The tool suite should include both front-end and back-end design and verification tools.
(2) Process Design Kits (PDKs) and IP (Intellectual property) cores are also critical in the design of IC chips. A Chip Design Hub should provide access to a variety of PDK and IP resources. IP cores refer to semiconductor design components that can be reused to increase overall productivity. IP cores are often found in a System on a Chip (SoC) in the form of digital, mixed-signal, or analog cores, and can even be the central processing unit, a memory interface, a co-processor, a network interface, a sensor, etc. Beyond cores, standard cell libraries, input/output (IO) pad libraries, and memories (compilers, controllers, etc.) are also important IP. IP cores can be provided as either hard (layout level for a specific technology) or soft (behavioral level and portable among technologies through synthesis, placement, and routing to create the layout) depending on the requirements. Hard IP cores are usually preferred for analog and mixed-signal designs, whereas digital IP cores are often behavioral and implemented in a Hardware Description Language (HDL) such as Verilog.
(3) Training: A Chip Design Hub should provide in-depth training for university design teams about the best practice towards a successful tape-out targeting each foundry process. The scope of training should include the PDK, IP, EDA tools, chip integration, packaging bump design, foundry cell insertion, design milestones and checklist, tape-out sign off requirements and checklist, and fabrication schedules. The training should also include reliability, electrostatic discharge (ESD) protection, yield optimization, and other nanometer design issues. The training may need to be offered multiple times per year and/or accessible online.
Student and research designs resulting from the design flow supported by a Chip Design Hub should be in the form of mask layout (i.e., GDSII) files suitable for fabrication using a variety of fabrication aggregation services (e.g., MOSIS, Muse, eFabless, etc.). While emerging technologies and predictive PDKs and design kits are welcome, the main focus should be on supporting access to tools, tool flows, and IP/PDKs for fabrication on standard CMOS processes.
Design support for emerging technologies is within the scope of this solicitation. Examples of such emerging device (X) technologies include, but are not limited to resistive memories, nano-magnetic memories, 2-D planar transistors, optical devices, carbon nanotube and ferroelectric transistors, etc. Due to the lack of prototyping of at-scale systems, such emerging technologies have remained in their embryonic stages and have not been fully integrated with CMOS chips to exploit the specific advantages they potentially provide to achieve superior system-level performance. Barriers to such integration at scale have been brought into focus by recent NSF workshops exploring "CMOS+X" approaches. See, for example, https://nsfedaworkshop.nd.edu/foundry-meeting/ and https://e3s-center.berkeley.edu/nsf-workshop-cmosx/cmos-x-report/. Accordingly, design efforts enabling integrations involving X technologies on CMOS wafers may be supported.
Post-fabrication supports such as packaging, board design, testing, etc. are welcome. Such supports may be in the form of tools, design guidelines, training materials, etc. It is important that such supports can be accessible remotely to reduce the overall cost born by students and researchers.
The Chip Design Hub program will not support projects that include science and engineering research (except for validation of operational readiness).
Proposals funded through this solicitation are expected to address major project and entity risk factors and incorporate techniques to mitigate those factors. Examples of such factors include loss of key project personnel, lack of engagement by EDA tool providers and chip manufacturers, pricing uncertainties or disruptions, unanticipated demand, and/or other potentially harmful risks identified by the entity.
Proposals must describe project roles and responsibilities with respect to cybersecurity for the facility as well as how security vulnerabilities will be assessed; what technical safeguards will be in place; what administrative safeguards will be maintained; what physical safeguards are planned; how policies and procedures for cybersecurity will be established and maintained; what the plans are for awareness and training; and what procedures will be in place for notification to NSF, the IC design community, other relevant communities, and appropriate authorities (e.g., local police, the Federal Bureau of Investigation). Proposers must describe how the effectiveness of the proposed cybersecurity program will be evaluated and assessed, and what approach will be taken to implement the cybersecurity plan.
III. Award Information
Anticipated Type of Award: Cooperative Agreement
Estimated Number of Awards: 2
NSF expects to fund up to two Chip Design Hub awards under this program.
Anticipated Funding Amount: $10,000,000
The maximum size and duration of an award will be up to $1.6 million per year for up to 5 years.
Estimated program budget, number of awards and average award size/duration are subject to the availability of funds.
IV. Eligibility Information
Who May Submit Proposals:
Proposals may only be submitted by the following:
- Non-profit, non-academic organizations: Independent museums, observatories, research laboratories, professional societies and similar organizations located in the U.S. that are directly associated with educational or research activities.
Institutions of Higher Education (IHEs) - Two- and four-year IHEs (including community colleges) accredited in, and having a campus located in the US, acting on behalf of their faculty members.
Who May Serve as PI:
By the date of submission, any PI or co-PI must hold either:
- a tenured or tenure-track position, or
- a primary, full-time, paid appointment in a research or teaching position
at a US-based campus of an organization eligible to submit to this solicitation (see above), with exceptions granted for family or medical leave, as determined by the submitting organization. Individuals at overseas branch campuses of US IHEs are not eligible. Individuals with primary appointments at for-profit non-academic organizations can serve as paid or unpaid Senior Personnel (i.e., not as PIs nor co-PIs).
Limit on Number of Proposals per Organization:
There are no restrictions or limits.
Limit on Number of Proposals per PI or co-PI: 1
In this competition, an individual may participate in at most one proposal as PI, co-PI, or Senior Personnel.
These eligibility constraints will be strictly enforced in order to treat everyone fairly and consistently. In the event that an individual exceeds this limit, proposals received within the limit will be accepted based on the earliest date and time of proposal submission (i.e., the first proposal received will be accepted and the remainder will be returned without review). No exceptions will be made.
Additional Eligibility Info:
Individuals with primary appointments at for-profit, non-academic organizations are allowed to participate but only as funded or unfunded Senior Personnel (i.e., not as PIs nor co-PIs).
While collaboration among multiple universities is strongly encouraged, a single proposal should be submitted by the lead organization. Support should be provided to collaborating organizations via subawards managed by the lead organization.
V. Proposal Preparation And Submission Instructions
A. Proposal Preparation Instructions
Full Proposal Preparation Instructions: Proposers may opt to submit proposals in response to this Program Solicitation via Research.gov or Grants.gov.
- Full Proposals submitted via Research.gov: Proposals submitted in response to this program solicitation should be prepared and submitted in accordance with the general guidelines contained in the NSF Proposal and Award Policies and Procedures Guide (PAPPG). The complete text of the PAPPG is available electronically on the NSF website at: https://www.nsf.gov/publications/pub_summ.jsp?ods_key=pappg. Paper copies of the PAPPG may be obtained from the NSF Publications Clearinghouse, telephone (703) 292-8134 or by e-mail from nsfpubs@nsf.gov. The Prepare New Proposal setup will prompt you for the program solicitation number.
- Full proposals submitted via Grants.gov: Proposals submitted in response to this program solicitation via Grants.gov should be prepared and submitted in accordance with the NSF Grants.gov Application Guide: A Guide for the Preparation and Submission of NSF Applications via Grants.gov. The complete text of the NSF Grants.gov Application Guide is available on the Grants.gov website and on the NSF website at: (https://www.nsf.gov/publications/pub_summ.jsp?ods_key=grantsgovguide). To obtain copies of the Application Guide and Application Forms Package, click on the Apply tab on the Grants.gov site, then click on the Apply Step 1: Download a Grant Application Package and Application Instructions link and enter the funding opportunity number, (the program solicitation number without the NSF prefix) and press the Download Package button. Paper copies of the Grants.gov Application Guide also may be obtained from the NSF Publications Clearinghouse, telephone (703) 292-8134 or by e-mail from nsfpubs@nsf.gov.
See PAPPG Chapter II.D.2 for guidance on the required sections of a full research proposal submitted to NSF. Please note that the proposal preparation instructions provided in this program solicitation may deviate from the PAPPG instructions.
Proposal Titles:
Proposal titles should begin with "Chip Design Hub:’’, followed by a short descriptive title for the proposed project.
Project Description:
In addition to the guidance contained in the PAPPG, please refer to Section II, Program Description, as well as the Additional Solicitation Specific Review Criteria section, for additional information and instructions on preparing this section of the proposal.
Supplementary Documents:
In addition to the requirements specified in the PAPPG, the following Supplementary Documents should be included:
(1) A list of Project Personnel and Partner Institutions:
Provide current, accurate information for all personnel and organizations involved in the project. NSF staff will use this information in the merit review process to manage reviewer selection. The list should include all PIs, co-PIs, Senior Personnel, paid/unpaid Consultants or Collaborators, Subawardees, Postdocs, and project-level advisory committee members. This list should be numbered and include (in this order) Full name, Organization(s), and Role in the project, with each item separated by a semi-colon. Each person listed should start a new numbered line. For example:
- Mei Lin; XYZ University; PI
- Jak Jabes; University of PQR; Senior Personnel
- Jane Brown; XYZ University; Postdoctoral Researcher
- Rakel Ademas; ABC Inc.; Paid Consultant
- Maria Wan; Welldone Institution; Unfunded Collaborator
- Rimon Greene; ZZZ University; Subawardee
(2) Collaboration Plan:
Success of Chip Design Hub efforts critically depends on thoughtful coordination mechanisms that regularly bring together the various participants of the project. Each proposal must include a Collaboration Plan of up to 2 pages. The length and degree of detail provided in the Collaboration Plan should be commensurate with the complexity of the proposed project. Where appropriate, the Collaboration Plan might include: 1) the specific roles of the project participants across all organizations involved; 2) information on how the project will be managed across all the investigators and institutions; 3) identification of the specific coordination mechanisms that will enable cross-investigator, cross-institution, and/or cross-discipline scientific integration (e.g., yearly workshops, graduate student exchanges, virtual/in-person project meetings, shared software repositories, etc.); and 4) specific references to the budget line items that support collaboration and coordination mechanisms. A proposal missing a Collaboration Plan will be returned without review.
(3) Letter of Collaboration:
For proposals involving academic institutions and industry, proposers should include a letter from the industrial partner(s) confirming the participation of one or more senior personnel from industry. This letter, uploaded in the Supplementary Documents section should describe a plan for interaction between the industrial and academic partners, the time commitment of the industrial partner(s), and the nature of the work. The total number of identified ( unfunded ) collaborators should not exceed 10.
(4) Data Management Plan (required):
This solicitation deviates from the PAPPG and allows up to three pages for the required Data Management Plan. Proposal preparation requirements as outlined in the PAPPG are compliance checked by NSF systems during proposal preparation and submission activities. Therefore, proposers must label this required document “Data Management Plan” and include it in the Other Supplementary Documents section of the proposal. In addition, proposers must upload a document into the Data Management Plan section in Research.gov that states “See the Other Supplementary Documents section of the proposal.”
Data management plans should describe how data and information, including proprietary information or intellectual property resulting from the proposed project will be managed with details on how data will be shared among partnering researchers and institutions. Chip Design Hub project proposals must also include in the Data Management Plan a description of how data will be shared with project partners and affiliates, how access to the data will be managed, and how the sensitivity of various data sets will be assessed.
Proposers must also ensure that they are aware of, and comply with, the International Traffic in Arms Regulations (ITAR) and Export Administration Regulations (EAR) in the context of prototype and technology development.
See Chapter II.D.2.i(ii) of the PAPPG for full policy implementation.
For additional information on the Dissemination and Sharing of Research Results, see: https://www.nsf.gov/bfa/dias/policy/dmp.jsp.
B. Budgetary Information
Cost Sharing:
Inclusion of voluntary committed cost sharing is prohibited.
Other Budgetary Limitations:
Request for foundry costs should be well justified since the program's focus is on infrastructure building.
C. Due Dates
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Full Proposal Deadline(s) (due by 5 p.m. submitter's local time):
April 04, 2024
D. Research.gov/Grants.gov Requirements
For Proposals Submitted Via Research.gov:
To prepare and submit a proposal via Research.gov, see detailed technical instructions available at: https://www.research.gov/research-portal/appmanager/base/desktop?_nfpb=true&_pageLabel=research_node_display&_nodePath=/researchGov/Service/Desktop/ProposalPreparationandSubmission.html. For Research.gov user support, call the Research.gov Help Desk at 1-800-381-1532 or e-mail rgov@nsf.gov. The Research.gov Help Desk answers general technical questions related to the use of the Research.gov system. Specific questions related to this program solicitation should be referred to the NSF program staff contact(s) listed in Section VIII of this funding opportunity.
For Proposals Submitted Via Grants.gov:
Before using Grants.gov for the first time, each organization must register to create an institutional profile. Once registered, the applicant's organization can then apply for any federal grant on the Grants.gov website. Comprehensive information about using Grants.gov is available on the Grants.gov Applicant Resources webpage: https://www.grants.gov/web/grants/applicants.html. In addition, the NSF Grants.gov Application Guide (see link in Section V.A) provides instructions regarding the technical preparation of proposals via Grants.gov. For Grants.gov user support, contact the Grants.gov Contact Center at 1-800-518-4726 or by email: support@grants.gov. The Grants.gov Contact Center answers general technical questions related to the use of Grants.gov. Specific questions related to this program solicitation should be referred to the NSF program staff contact(s) listed in Section VIII of this solicitation.
Submitting the Proposal: Once all documents have been completed, the Authorized Organizational Representative (AOR) must submit the application to Grants.gov and verify the desired funding opportunity and agency to which the application is submitted. The AOR must then sign and submit the application to Grants.gov. The completed application will be transferred to Research.gov for further processing.
The NSF Grants.gov Proposal Processing in Research.gov informational page provides submission guidance to applicants and links to helpful resources including the NSF Grants.gov Application Guide, Grants.gov Proposal Processing in Research.gov how-to guide, and Grants.gov Submitted Proposals Frequently Asked Questions. Grants.gov proposals must pass all NSF pre-check and post-check validations in order to be accepted by Research.gov at NSF.
When submitting via Grants.gov, NSF strongly recommends applicants initiate proposal submission at least five business days in advance of a deadline to allow adequate time to address NSF compliance errors and resubmissions by 5:00 p.m. submitting organization's local time on the deadline. Please note that some errors cannot be corrected in Grants.gov. Once a proposal passes pre-checks but fails any post-check, an applicant can only correct and submit the in-progress proposal in Research.gov.
Proposers that submitted via Research.gov may use Research.gov to verify the status of their submission to NSF. For proposers that submitted via Grants.gov, until an application has been received and validated by NSF, the Authorized Organizational Representative may check the status of an application on Grants.gov. After proposers have received an e-mail notification from NSF, Research.gov should be used to check the status of an application.
VI. NSF Proposal Processing And Review Procedures
Proposals received by NSF are assigned to the appropriate NSF program for acknowledgement and, if they meet NSF requirements, for review. All proposals are carefully reviewed by a scientist, engineer, or educator serving as an NSF Program Officer, and usually by three to ten other persons outside NSF either as ad hoc reviewers, panelists, or both, who are experts in the particular fields represented by the proposal. These reviewers are selected by Program Officers charged with oversight of the review process. Proposers are invited to suggest names of persons they believe are especially well qualified to review the proposal and/or persons they would prefer not review the proposal. These suggestions may serve as one source in the reviewer selection process at the Program Officer's discretion. Submission of such names, however, is optional. Care is taken to ensure that reviewers have no conflicts of interest with the proposal. In addition, Program Officers may obtain comments from site visits before recommending final action on proposals. Senior NSF staff further review recommendations for awards. A flowchart that depicts the entire NSF proposal and award process (and associated timeline) is included in PAPPG Exhibit III-1.
A comprehensive description of the Foundation's merit review process is available on the NSF website at: https://www.nsf.gov/bfa/dias/policy/merit_review/.
Proposers should also be aware of core strategies that are essential to the fulfillment of NSF's mission, as articulated in Leading the World in Discovery and Innovation, STEM Talent Development and the Delivery of Benefits from Research - NSF Strategic Plan for Fiscal Years (FY) 2022 - 2026 . These strategies are integrated in the program planning and implementation process, of which proposal review is one part. NSF's mission is particularly well-implemented through the integration of research and education and broadening participation in NSF programs, projects, and activities.
One of the strategic objectives in support of NSF's mission is to foster integration of research and education through the programs, projects, and activities it supports at academic and research institutions. These institutions must recruit, train, and prepare a diverse STEM workforce to advance the frontiers of science and participate in the U.S. technology-based economy. NSF's contribution to the national innovation ecosystem is to provide cutting-edge research under the guidance of the Nation's most creative scientists and engineers. NSF also supports development of a strong science, technology, engineering, and mathematics (STEM) workforce by investing in building the knowledge that informs improvements in STEM teaching and learning.
NSF's mission calls for the broadening of opportunities and expanding participation of groups, institutions, and geographic regions that are underrepresented in STEM disciplines, which is essential to the health and vitality of science and engineering. NSF is committed to this principle of diversity and deems it central to the programs, projects, and activities it considers and supports.
A. Merit Review Principles and Criteria
The National Science Foundation strives to invest in a robust and diverse portfolio of projects that creates new knowledge and enables breakthroughs in understanding across all areas of science and engineering research and education. To identify which projects to support, NSF relies on a merit review process that incorporates consideration of both the technical aspects of a proposed project and its potential to contribute more broadly to advancing NSF's mission "to promote the progress of science; to advance the national health, prosperity, and welfare; to secure the national defense; and for other purposes." NSF makes every effort to conduct a fair, competitive, transparent merit review process for the selection of projects.
1. Merit Review Principles
These principles are to be given due diligence by PIs and organizations when preparing proposals and managing projects, by reviewers when reading and evaluating proposals, and by NSF program staff when determining whether or not to recommend proposals for funding and while overseeing awards. Given that NSF is the primary federal agency charged with nurturing and supporting excellence in basic research and education, the following three principles apply:
- All NSF projects should be of the highest quality and have the potential to advance, if not transform, the frontiers of knowledge.
- NSF projects, in the aggregate, should contribute more broadly to achieving societal goals. These "Broader Impacts" may be accomplished through the research itself, through activities that are directly related to specific research projects, or through activities that are supported by, but are complementary to, the project. The project activities may be based on previously established and/or innovative methods and approaches, but in either case must be well justified.
- Meaningful assessment and evaluation of NSF funded projects should be based on appropriate metrics, keeping in mind the likely correlation between the effect of broader impacts and the resources provided to implement projects. If the size of the activity is limited, evaluation of that activity in isolation is not likely to be meaningful. Thus, assessing the effectiveness of these activities may best be done at a higher, more aggregated, level than the individual project.
With respect to the third principle, even if assessment of Broader Impacts outcomes for particular projects is done at an aggregated level, PIs are expected to be accountable for carrying out the activities described in the funded project. Thus, individual projects should include clearly stated goals, specific descriptions of the activities that the PI intends to do, and a plan in place to document the outputs of those activities.
These three merit review principles provide the basis for the merit review criteria, as well as a context within which the users of the criteria can better understand their intent.
2. Merit Review Criteria
All NSF proposals are evaluated through use of the two National Science Board approved merit review criteria. In some instances, however, NSF will employ additional criteria as required to highlight the specific objectives of certain programs and activities.
The two merit review criteria are listed below. Both criteria are to be given full consideration during the review and decision-making processes; each criterion is necessary but neither, by itself, is sufficient. Therefore, proposers must fully address both criteria. (PAPPG Chapter II.D.2.d(i). contains additional information for use by proposers in development of the Project Description section of the proposal). Reviewers are strongly encouraged to review the criteria, including PAPPG Chapter II.D.2.d(i), prior to the review of a proposal.
When evaluating NSF proposals, reviewers will be asked to consider what the proposers want to do, why they want to do it, how they plan to do it, how they will know if they succeed, and what benefits could accrue if the project is successful. These issues apply both to the technical aspects of the proposal and the way in which the project may make broader contributions. To that end, reviewers will be asked to evaluate all proposals against two criteria:
- Intellectual Merit: The Intellectual Merit criterion encompasses the potential to advance knowledge; and
- Broader Impacts: The Broader Impacts criterion encompasses the potential to benefit society and contribute to the achievement of specific, desired societal outcomes.
The following elements should be considered in the review for both criteria:
- What is the potential for the proposed activity to
- Advance knowledge and understanding within its own field or across different fields (Intellectual Merit); and
- Benefit society or advance desired societal outcomes (Broader Impacts)?
- To what extent do the proposed activities suggest and explore creative, original, or potentially transformative concepts?
- Is the plan for carrying out the proposed activities well-reasoned, well-organized, and based on a sound rationale? Does the plan incorporate a mechanism to assess success?
- How well qualified is the individual, team, or organization to conduct the proposed activities?
- Are there adequate resources available to the PI (either at the home organization or through collaborations) to carry out the proposed activities?
Broader impacts may be accomplished through the research itself, through the activities that are directly related to specific research projects, or through activities that are supported by, but are complementary to, the project. NSF values the advancement of scientific knowledge and activities that contribute to achievement of societally relevant outcomes. Such outcomes include, but are not limited to: full participation of women, persons with disabilities, and other underrepresented groups in science, technology, engineering, and mathematics (STEM); improved STEM education and educator development at any level; increased public scientific literacy and public engagement with science and technology; improved well-being of individuals in society; development of a diverse, globally competitive STEM workforce; increased partnerships between academia, industry, and others; improved national security; increased economic competitiveness of the United States; and enhanced infrastructure for research and education.
Proposers are reminded that reviewers will also be asked to review the Data Management Plan and the Postdoctoral Researcher Mentoring Plan, as appropriate.
Additional Solicitation Specific Review Criteria
In addition to the standard NSF Merit review criteria, proposals submitted to this program will be evaluated according to the following criteria. Proposers are alerted to address the following elements in preparing their proposals.
- How well does the proposed project enable new research directions that were previously intractable, infeasible, or impractical prior to this project?
- To what degree are education and workforce development addressed in the project and how will the activities strengthen post-secondary education and lead toward a measurably positive impact on the semiconductor workforce?
- How broad will the range of semiconductor-based systems be that are enabled, particularly considering CMOS fabrication at different feature sizes?
- How robust are the plans for engaging the user community to validate the impact of the project investment and for sustainability beyond the initial NSF investment to support the Chip Design Hub?
- How robust are the plans for engaging with open-source, academic, and non-academic entities, including tool vendors, fabrication facilities, PDK and IP providers, and vendors that support end-to-end design flows?
- Are collaboration letters included from collaborators (e.g., industry or other academic institutions) who will contribute to the project in meaningful ways?
Research Security
NSF is committed to safeguarding the research enterprise while maintaining a research environment that is as open as possible and operates with the highest standards of integrity. To achieve these goals, proposals submitted to NSF in response to this solicitation are scrutinized, apart from the merit review process, for possible research security concerns that could have implications for U.S. national security. If research security concerns are identified, NSF’s Office of Research Security Strategy and Policy will work with the submitting organization to address them. Chip Design Hub projects may require special measures to be taken (e.g., additional training for the principal and co-principal investigators, a project research security point of contact) to ensure the research is adequately protected. Proposers must designate a member of the Leadership Team as the research security point of contact to coordinate with NSF’s Office of Research Security Strategy and Policy on potential research security-related concerns.
B. Review and Selection Process
Proposals submitted in response to this program solicitation will be reviewed by Ad hoc Review and/or Panel Review, Site Visit Review, or Reverse Site Review.
Proposals submitted in response to this program solicitation will be reviewed by panel review, ad hoc review, and subsequent site visits and/or reverse site.
Reviewers will be asked to evaluate proposals using two National Science Board approved merit review criteria and, if applicable, additional program specific criteria. A summary rating and accompanying narrative will generally be completed and submitted by each reviewer and/or panel. The Program Officer assigned to manage the proposal's review will consider the advice of reviewers and will formulate a recommendation.
After scientific, technical and programmatic review and consideration of appropriate factors, the NSF Program Officer recommends to the cognizant Division Director whether the proposal should be declined or recommended for award. NSF strives to be able to tell proposers whether their proposals have been declined or recommended for funding within six months. Large or particularly complex proposals or proposals from new recipients may require additional review and processing time. The time interval begins on the deadline or target date, or receipt date, whichever is later. The interval ends when the Division Director acts upon the Program Officer's recommendation.
After programmatic approval has been obtained, the proposals recommended for funding will be forwarded to the Division of Grants and Agreements or the Division of Acquisition and Cooperative Support for review of business, financial, and policy implications. After an administrative review has occurred, Grants and Agreements Officers perform the processing and issuance of a grant or other agreement. Proposers are cautioned that only a Grants and Agreements Officer may make commitments, obligations or awards on behalf of NSF or authorize the expenditure of funds. No commitment on the part of NSF should be inferred from technical or budgetary discussions with a NSF Program Officer. A Principal Investigator or organization that makes financial or personnel commitments in the absence of a grant or cooperative agreement signed by the NSF Grants and Agreements Officer does so at their own risk.
Once an award or declination decision has been made, Principal Investigators are provided feedback about their proposals. In all cases, reviews are treated as confidential documents. Verbatim copies of reviews, excluding the names of the reviewers or any reviewer-identifying information, are sent to the Principal Investigator/Project Director by the Program Officer. In addition, the proposer will receive an explanation of the decision to award or decline funding.
VII. Award Administration Information
A. Notification of the Award
Notification of the award is made to the submitting organization by an NSF Grants and Agreements Officer. Organizations whose proposals are declined will be advised as promptly as possible by the cognizant NSF Program administering the program. Verbatim copies of reviews, not including the identity of the reviewer, will be provided automatically to the Principal Investigator. (See Section VI.B. for additional information on the review process.)
B. Award Conditions
An NSF award consists of: (1) the award notice, which includes any special provisions applicable to the award and any numbered amendments thereto; (2) the budget, which indicates the amounts, by categories of expense, on which NSF has based its support (or otherwise communicates any specific approvals or disapprovals of proposed expenditures); (3) the proposal referenced in the award notice; (4) the applicable award conditions, such as Grant General Conditions (GC-1)*; or Research Terms and Conditions* and (5) any announcement or other NSF issuance that may be incorporated by reference in the award notice. Cooperative agreements also are administered in accordance with NSF Cooperative Agreement Financial and Administrative Terms and Conditions (CA-FATC) and the applicable Programmatic Terms and Conditions. NSF awards are electronically signed by an NSF Grants and Agreements Officer and transmitted electronically to the organization via e-mail.
*These documents may be accessed electronically on NSF's Website at https://www.nsf.gov/awards/managing/award_conditions.jsp?org=NSF. Paper copies may be obtained from the NSF Publications Clearinghouse, telephone (703) 292-8134 or by e-mail from nsfpubs@nsf.gov.
More comprehensive information on NSF Award Conditions and other important information on the administration of NSF awards is contained in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) Chapter VII, available electronically on the NSF Website at https://www.nsf.gov/publications/pub_summ.jsp?ods_key=pappg.
Administrative and National Policy Requirements
Build America, Buy America
As expressed in Executive Order 14005, Ensuring the Future is Made in All of America by All of Americas Workers (86 FR 7475), it is the policy of the executive branch to use terms and conditions of Federal financial assistance awards to maximize, consistent with law, the use of goods, products, and materials produced in, and services offered in, the United States.
Consistent with the requirements of the Build America, Buy America Act (Pub. L. 117-58, Division G, Title IX, Subtitle A, November 15, 2021), no funding made available through this funding opportunity may be obligated for an award unless all iron, steel, manufactured products, and construction materials used in the project are produced in the United States. For additional information, visit NSFs Build America, Buy America webpage.
Special Award Conditions:
Awards will be made in the form of cooperative agreements. The cooperative agreements will have an extensive section of Special Conditions relating to the period of performance, statement of work, recipient responsibilities, NSF responsibilities, joint NSF- recipient responsibilities, funding and funding schedule, reporting requirements, key personnel, and other conditions. NSF has responsibility for providing general oversight and monitoring of the project(s) to help assure effective performance and administration, as well as facilitating any coordination among the recipient as necessary to further the objectives of the program. Within the first 90 days of the Award, a retreat of the awarded projects' key personnel, organized by the award recipient, to address strategic planning of the Chip Design Hub will be required. The budget should include expenses for this retreat.
NSF may conduct site visits and/or reverse site visits led by NSF staff as part of the proposal evaluation process as well as subsequent review of the project performance. These visits may include a panel of external evaluators. The frequency or schedule of site visits and/or reverse site visits of the recipient institutions will be further specified in the award-specific terms and conditions in the cooperative agreement.
Support for each year of the cooperative agreement of a funded project will be contingent upon a satisfactory annual review (possibly including a site visit or reverse site visit) by NSF of the project's progress and future plans, with an emphasis on meeting the solicitation specific criteria. All funding is subject to availability.
Acknowledgement of Support
Recipients will be required to include appropriate acknowledgment of NSF support in reports and/or publications on work performed under an award. An example of such an acknowledgement would be: This material is based upon work supported by the program supported by NSF under Award Title and No. [Recipient enters project title and awards number(s)].
C. Reporting Requirements
For all multi-year grants (including both standard and continuing grants), the Principal Investigator must submit an annual project report to the cognizant Program Officer no later than 90 days prior to the end of the current budget period. (Some programs or awards require submission of more frequent project reports). No later than 120 days following expiration of a grant, the PI also is required to submit a final project report, and a project outcomes report for the general public.
Failure to provide the required annual or final project reports, or the project outcomes report, will delay NSF review and processing of any future funding increments as well as any pending proposals for all identified PIs and co-PIs on a given award. PIs should examine the formats of the required reports in advance to assure availability of required data.
PIs are required to use NSF's electronic project-reporting system, available through Research.gov, for preparation and submission of annual and final project reports. Such reports provide information on accomplishments, project participants (individual and organizational), publications, and other specific products and impacts of the project. Submission of the report via Research.gov constitutes certification by the PI that the contents of the report are accurate and complete. The project outcomes report also must be prepared and submitted using Research.gov. This report serves as a brief summary, prepared specifically for the public, of the nature and outcomes of the project. This report will be posted on the NSF website exactly as it is submitted by the PI.
More comprehensive information on NSF Reporting Requirements and other important information on the administration of NSF awards is contained in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) Chapter VII, available electronically on the NSF Website at https://www.nsf.gov/publications/pub_summ.jsp?ods_key=pappg.
Additional reporting requirements will be negotiated with the PI prior to award and will be incorporated into the special terms and conditions of the award. This may include but not limited to more frequent reports beyond the annual report.
VIII. Agency Contacts
Please note that the program contact information is current at the time of publishing. See program website for any updates to the points of contact.
General inquiries regarding this program should be made to:
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X. Sharon Hu, Program Director (CCF), telephone: (703) 292-8910, email: chip_hub@nsf.gov
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Sankar Basu, Program Director (CCF), telephone: (703) 292-7843, email: chip_hub@nsf.gov
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Jason O. Hallstrom, Program Director (CNS), telephone: (703)292-8950, email: chip_hub@nsf.gov
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Andrey Kanaev, Program Director (OAC), telephone: (703) 292-2841, email: chip_hub@nsf.gov
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Danella Zhao, Program Director (CCF), telephone: (703) 292-4434, email: chip_hub@nsf.gov
For questions related to the use of NSF systems contact:
- NSF Help Desk: 1-800-381-1532
- Research.gov Help Desk e-mail: rgov@nsf.gov
For questions relating to Grants.gov contact:
- Grants.gov Contact Center: If the Authorized Organizational Representatives (AOR) has not received a confirmation message from Grants.gov within 48 hours of submission of application, please contact via telephone: 1-800-518-4726; e-mail: support@grants.gov.
IX. Other Information
The NSF website provides the most comprehensive source of information on NSF Directorates (including contact information), programs and funding opportunities. Use of this website by potential proposers is strongly encouraged. In addition, "NSF Update" is an information-delivery system designed to keep potential proposers and other interested parties apprised of new NSF funding opportunities and publications, important changes in proposal and award policies and procedures, and upcoming NSF Grants Conferences. Subscribers are informed through e-mail or the user's Web browser each time new publications are issued that match their identified interests. "NSF Update" also is available on NSF's website.
Grants.gov provides an additional electronic capability to search for Federal government-wide grant opportunities. NSF funding opportunities may be accessed via this mechanism. Further information on Grants.gov may be obtained at https://www.grants.gov.
About The National Science Foundation
The National Science Foundation (NSF) is an independent Federal agency created by the National Science Foundation Act of 1950, as amended (42 USC 1861-75). The Act states the purpose of the NSF is "to promote the progress of science; [and] to advance the national health, prosperity, and welfare by supporting research and education in all fields of science and engineering."
NSF funds research and education in most fields of science and engineering. It does this through grants and cooperative agreements to more than 2,000 colleges, universities, K-12 school systems, businesses, informal science organizations and other research organizations throughout the US. The Foundation accounts for about one-fourth of Federal support to academic institutions for basic research.
NSF receives approximately 55,000 proposals each year for research, education and training projects, of which approximately 11,000 are funded. In addition, the Foundation receives several thousand applications for graduate and postdoctoral fellowships. The agency operates no laboratories itself but does support National Research Centers, user facilities, certain oceanographic vessels and Arctic and Antarctic research stations. The Foundation also supports cooperative research between universities and industry, US participation in international scientific and engineering efforts, and educational activities at every academic level.
Facilitation Awards for Scientists and Engineers with Disabilities (FASED) provide funding for special assistance or equipment to enable persons with disabilities to work on NSF-supported projects. See the NSF Proposal & Award Policies & Procedures Guide Chapter II.F.7 for instructions regarding preparation of these types of proposals.
The National Science Foundation has Telephonic Device for the Deaf (TDD) and Federal Information Relay Service (FIRS) capabilities that enable individuals with hearing impairments to communicate with the Foundation about NSF programs, employment or general information. TDD may be accessed at (703) 292-5090 and (800) 281-8749, FIRS at (800) 877-8339.
The National Science Foundation Information Center may be reached at (703) 292-5111.
The National Science Foundation promotes and advances scientific progress in the United States by competitively awarding grants and cooperative agreements for research and education in the sciences, mathematics, and engineering. To get the latest information about program deadlines, to download copies of NSF publications, and to access abstracts of awards, visit the NSF Website at https://www.nsf.gov
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Privacy Act And Public Burden Statements
The information requested on proposal forms and project reports is solicited under the authority of the National Science Foundation Act of 1950, as amended. The information on proposal forms will be used in connection with the selection of qualified proposals; and project reports submitted by proposers will be used for program evaluation and reporting within the Executive Branch and to Congress. The information requested may be disclosed to qualified reviewers and staff assistants as part of the proposal review process; to proposer institutions/grantees to provide or obtain data regarding the proposal review process, award decisions, or the administration of awards; to government contractors, experts, volunteers and researchers and educators as necessary to complete assigned work; to other government agencies or other entities needing information regarding proposers or nominees as part of a joint application review process, or in order to coordinate programs or policy; and to another Federal agency, court, or party in a court or Federal administrative proceeding if the government is a party. Information about Principal Investigators may be added to the Reviewer file and used to select potential candidates to serve as peer reviewers or advisory committee members. See System of Record Notices, NSF-50, "Principal Investigator/Proposal File and Associated Records," and NSF-51, "Reviewer/Proposal File and Associated Records.” Submission of the information is voluntary. Failure to provide full and complete information, however, may reduce the possibility of receiving an award.
An agency may not conduct or sponsor, and a person is not required to respond to, an information collection unless it displays a valid Office of Management and Budget (OMB) control number. The OMB control number for this collection is 3145-0058. Public reporting burden for this collection of information is estimated to average 120 hours per response, including the time for reviewing instructions. Send comments regarding the burden estimate and any other aspect of this collection of information, including suggestions for reducing this burden, to:
Suzanne H. Plimpton
Reports Clearance Officer
Policy Office, Division of Institution and Award Support
Office of Budget, Finance, and Award Management
National Science Foundation
Alexandria, VA 22314