Equitable and Transformative Approaches to Educating the Semiconductor Workforce (ETA-ESW)
Dear Colleagues:
Leading the world in discovery and innovation, science, technology, engineering, and mathematics (STEM) talent development, and the delivery of benefits from research are the objectives of the National Science Foundation (NSF). The 2022-2026 Strategic Plan1 highlights the importance of U.S. global competitiveness and its critical dependence on the readiness of the Nation's STEM workforce. To achieve this goal, NSF invests in programs that directly advance this workforce. As part of this effort, this DCL announces a cooperative activity between NSF and the Micron Foundation to stimulate transformative approaches to: (a) improve and impact education and training of the advanced memory manufacturing, microelectronics, and semiconductor workforce of the future; and (b) expand equitable opportunities and access to experiential learning programs in cleanrooms and other teaching laboratories.
As part of this effort, this DCL announces new award opportunities for two programs: the Improving Undergraduate STEM Education (IUSE) program and the Experiential Learning for Emerging and Novel Technologies (ExLENT) program that build on or leverage strong industry-academic partnerships to strengthen the semiconductor manufacturing workforce. Efforts are intended to advance and support the development of a skilled STEM workforce in advanced memory manufacturing and/or semiconductor manufacturing and design. This DCL will support efforts to: create new and broaden access to existing programs, experiential learning activities, courses, curricula, and/or certificates; adapt and implement evidence-based instructional and inclusive practices; develop and/or integrate industry standards into programs of study and courses; foster skilled educators; and investigate activities and factors associated with student performance. Therefore, this DCL also aims to encourage partnerships among companies; state, local, and tribal government offices; non-profits; schools; professional organizations; and/or institutions of higher education (including two-year and minority serving institutions (MSIs)).
BACKGROUND
Over the years, the semiconductor industry has become a major component of the global economy. To support this growth, there is critical need to expand domestic "semiconductor research and development, design, and manufacturing"2. Recognizing the talent shortage in the domestic semiconductor industry3, this DCL is a targeted opportunity to educate and prepare the nation's current and future semiconductor workforce and to advance inclusive and equitable STEM education opportunities. To accomplish this objective, the DCL is a call to action to advance innovative and evidence-based practices and curricular resources in the education and intellectual development of the semiconductor industry and advanced manufacturing workforce.
This DCL encourages submission of proposals through the following two NSF programs that support education and workforce development efforts at institutions of higher education:
- Improving Undergraduate STEM Education (IUSE) for advanced semiconductor manufacturing industry;
- Experiential Learning for Emerging and Novel Technologies (ExLENT) program for advanced semiconductor manufacturing industry.
Proposers are encouraged to explore a wide range of innovations that are research-informed and result in field-tested outcomes and products that enhance engineering technology and advanced manufacturing education and training in the areas of semiconductor manufacturing and/or semiconductor design. Possible approaches to respond to this opportunity that meet the requirements of the relevant programs (IUSE and ExLENT) are listed below, but are not limited to the following:
- To increase awareness and training opportunities through experiential education;
- To increase the adaptation and implementation of evidence-based curricula and pedagogies in those fields, through training on curricula or pedagogy for faculty and/or secondary teachers, better integration, and encapsulation of curricula for sharing, broader dissemination networks, collaboration, and networking opportunities;
- To align and incorporate industry, professional, and/or technical standards in teaching and learning and to incorporate career skills in training and education, thereby securing them to career pathways;
- To integrate systematic approaches to advance inclusive and equitable STEM education practices;
- To build the capacity for institutions' rapid response to the changes in the STEM workforce; and,
- To investigate student success in academia and/or in the workforces in semiconductors and/or associated fields.
Before submission, proposers are encouraged to discuss their ideas with relevant program officers, named at the end of this document. Proposals should be prepared and submitted in accordance with the requirements specified in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) and also must adhere to the deadline dates and guidance specified in the program solicitation to which the proposal will be submitted.
When responding to this DCL, please include "ETA-ESW DCL:" at the beginning of the proposal title or immediately following any solicitation specific title prefix. Funding level will be based on guidelines provided in the respective program solicitations.
Proposals can build from the perspectives and strengths of talent pools that have not yet been fully tapped. NSF encourages proposals that include the participation of the full spectrum of diverse talent in Science, Technology, Engineering and Mathematics (STEM).
SUBMISSION AND REVIEW
Proposals to be submitted to the IUSE or ExLENT programs through the regular proposal submission process should be discussed with the cognizant Program Officer prior to formal submission.
Proposals submitted in response to this DCL must adhere to all the requirements expressed in the respective (IUSE or ExLENT) program solicitation.
Proposals should be submitted to the designated program of interest via the regular proposal submission process and will be reviewed via the NSF Merit Review process.
Proposals submitted in response to this DCL may be made available to the Micron Foundation along with other proposal information (including unattributed reviews, and if awarded, copies of annual and final reports). In accordance with NSF policy (PAPPG) letters of support are not permitted. Micron and Micron Foundation will also not provide letters of collaboration and/or commitment for proposals submitted to the IUSE and ExLENT programs in response to this DCL.
Micron and Micron Foundation will be provided a listing of all award recipients funded under this DCL. Recipients funded under this DCL will have the option to separately engage with Micron, including access to Micron subject matter experts.
REFERENCES
2 Semiconductor Industry Association, May 2021. Chipping In: The positive Impact of the Semiconductor Industry on the American Workforce and How Federal Industry Incentives will increase Domestic Jobs (conducted by Oxford Economics).
3 IEEE Spectrum May 13, 2023. U.S. Universities Are Building a New Semiconductor Workforce: The CHIPS Act could require 50,000 new engineers
ADDITIONAL RESOURCES
CHIPS and Science Act Public Law 117-167
PROGRAM CONTACTS
- Karen Crosby, kcrosby@nsf.gov, IUSE: EDU Program Officer, ExLENT Program Co-Lead, EDU/DUE
- Mary Crowe, mcrowe@nsf.gov, ExLENT Program Co-Lead, TIP/ITE
Sincerely,
James Moore
Assistant Director
Directorate for STEM Education (EDU)
Erwin Gianchandani
Assistant Director
Directorate for Technology, Innovation and Partnerships (TIP)