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NSF/Intel Partnership on Computer Assisted Programming for Heterogeneous Architectures (CAPA)

Status: Archived

Archived funding opportunity

This document has been archived.

Important information for proposers

All proposals must be submitted in accordance with the requirements specified in this funding opportunity and in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) that is in effect for the relevant due date to which the proposal is being submitted. It is the responsibility of the proposer to ensure that the proposal meets these requirements. Submitting a proposal prior to a specified deadline does not negate this requirement.


An emerging trend in hardware platforms is that of architectural heterogeneity. While modern central processing units (CPUs) provide a flexible set of hardware resources and rich instruction sets for implementing a broad spectrum of compute tasks, specialized workloads have motivated the introduction of alternative hardware architectures to accelerate operations using specialized circuit design and additional parallelism. Some examples of such hardware include graphical processing units (GPUs), digital signal processors (DSPs), programmable accelerators, and customizable field programmable gate arrays (FPGAs). Meanwhile, CPU designs have grown in diversity also, with considerable variation in number of cores, memory hierarchy, core organization, inter-core communication, and vector instruction sets. The trend toward data centers as a new computing platform adds even more complexity. Target architectures now can include thousands of geographically distributed computing elements, varying communication speeds, complex storage hierarchies, and a diverse set of underlying hardware platforms.

Software development is now transitioning from a specialized practice by a small number of experts to an everyday skill for a broad spectrum of non-specialists. But at the same time, the increasing complexity and diversity of programming models and hardware platforms requires specialized knowledge to develop and maintain efficient software solutions.  The result is a widening gap between programmers with general skills and specialized knowledge required to effectively utilize today‚Äôs heterogeneous hardware platforms. Many platform types fail to be utilized to their full potential, and the performance and energy efficiency gains needed to solve the next frontier of computing challenges fail to be realized. To efficiently utilize the computing power of future computer architectures without specialized expertise will require a transformational leap in software development methodologies.

The NSF/Intel Partnership on Computer Assisted Programming for Heterogeneous Architectures (CAPA) aims to address the problem of effective software development for diverse hardware architectures through groundbreaking university research that will lead to a significant, measurable leap in software development productivity by partially or fully automating software development tasks that are currently performed by humans. The main research objectives for CAPA include programmer effectiveness, performance portability, and performance predictability. In order to address these objectives, CAPA seeks research proposals that explore (1) programming abstractions and/or methodologies that separate performance-related aspects of program design from how they are implemented; (2) program synthesis and machine learning approaches for automatic software construction that are demonstrably correct; (3) advanced hardware-based cost models and abstractions to support multi-target code generation and performance predictability for specified heterogeneous hardware architectures; and (4) integration of research results into principled software development practices.

Program contacts

Nina Amla
Program Director, CISE/CCF
namla@nsf.gov (703) 292-7991 CISE/OAD
Anindya Banerjee
Program Director, CISE/CCF
abanerje@nsf.gov (703) 292-7885 CISE/CCF
Sol Greenspan
Program Director, CISE/CCF
sgreensp@nsf.gov (703) 292-8910 CISE/CCF
Tatiana Shpeisman
Director, Programming Systems Research, Intel Labs
tatiana.shpeisman@intel.com (408) 765-0172
Justin Gottschlich
Senior Staff Research Scientist, Intel Labs
justin.gottschlich@intel.com (408) 765-3783
Shalom Goldenberg
Program Director, Intel Labs
shalom.goldenberg@intel.com (971) 258-6941

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