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National Science Foundation - Future of Semiconductors (FuSe2)

Status: Archived

Archived funding opportunity

This document has been archived. See NSF 24-521 for the latest version.

Important information about NSF’s implementation of the revised 2 CFR

NSF Financial Assistance awards (grants and cooperative agreements) made on or after October 1, 2024, will be subject to the applicable set of award conditions, dated October 1, 2024, available on the NSF website. These terms and conditions are consistent with the revised guidance specified in the OMB Guidance for Federal Financial Assistance published in the Federal Register on April 22, 2024.

Important information for proposers

All proposals must be submitted in accordance with the requirements specified in this funding opportunity and in the NSF Proposal & Award Policies & Procedures Guide (PAPPG) that is in effect for the relevant due date to which the proposal is being submitted. It is the responsibility of the proposer to ensure that the proposal meets these requirements. Submitting a proposal prior to a specified deadline does not negate this requirement.

Synopsis

The current state of semiconductor microelectronic systems is at a crossroads. Continued advances in the capabilities of many technologies as well as the cost of the applications of these technologies across computing, sensing, and communications are threatened. The technology has expanded following the trends in miniaturization long characterized by Moore’s Law, underpinned by new materials, processes, devices, and architectures. The developments in these underpinning areas have often progressed independent of the application area, which has delayed their incorporation into the next-generation technologies. Closing that gap between the essential components in the technology chain is now required to ensure further progress. The materials, devices, and systems need to be co-designed, that is, they need to be designed with simultaneous consideration of elements of the technology chain.

The benefits of a co-design approach as a principal methodology to advance semiconductor technology have been widely recognized in a variety of government and industry studies. This holistic, co-design approach can more rapidly create high-performance, robust, secure, compact, energy-efficient, and cost-effective solutions. The technological drivers include the need to: dramatically reduce the energy consumption of computation and communication technologies; reduce the impact of device and system manufacturing on the environment; increase performance speed and capacity; and develop new computing systems.

The goal of this solicitation is to cultivate a broad coalition of researchers and educators from across science and engineering communities that utilizes a holistic, co-design approach to fundamental research and workforce education and training, to enable rapid progress in new semiconductor technologies. The future of semiconductor manufacturing will require the design and deployment of diverse new technologies in materials, chemical and materials processes, devices, and architectures through the development of application-driven systems. Partnerships between industry and academic institutions are essential to spur innovation and technology transfer, to inform the research needs, and to train the future workforce.

The program seeks to fund research as well as curriculum and workforce development to improve science, technology, engineering, and mathematics (STEM) education at the nation’s institutions of higher education, spanning two-year colleges and four-year universities and inclusive of minority-serving institutions, to advance semiconductor design and manufacturing. NSF encourages bold, potentially transformative activities that address future semiconductor manufacturing technical challenges and shortages in the skilled scientist, engineer, and technician workforce. This solicitation encourages proposers to include a holistic perspective on workforce regarding diversity and equitable access to STEM career paths and education by engaging the academic community to broaden access and exposure to advanced technologies and research capabilities. All proposals should address workforce development plans and research.

This solicitation seeks proposals to perform fundamental research to enable the development of a new paradigm in semiconductor capabilities through supporting research grants for teams that are practicing co-design approaches and solutions as well as facilitating and coalescing new teams with a vision for co-design methodologies. Teams of all sizes and co-design research proposals of all scopes (i.e., beyond the scope of research that could be submitted to a regular NSF program) are encouraged.

Future of Semiconductor Co-Design Research and Education Grants (FuSe-REG) - Awards will be supported in FY 2023 up to $2M per award for up to a three-year grant period, commensurate with the scope and team size. This program seeks to fund collaborative team research that transcends the traditional boundaries of individual disciplines to achieve the program goals.

The three research topic areas identified for support in FY 2023 under this solicitation are:

  • Collaborative Research in Domain-Specific Computing;
  • Advanced Function and High-Performance by Heterogenous Integration; and
  • New Materials for Energy-Efficient, Enhanced-Performance and Sustainable Semiconductor-Based Systems.

Details are provided under Program Description in Section II. Each proposal should explicitly identify at least one of these research topic areas to focus on, though proposals which merge ideas from multiple topic areas are encouraged. Every proposal should address co-design covering at least two of the areas in the technology stack (materials, devices, and systems) in the research approach.

Please note that the program contact information is current at the time of publishing. See program website for any updates to the points of contact.

Program contacts

 
Name Email Phone Organization
Nadia A. El-Masry
fuse1@nsf.gov (703) 292-4975 ENG/EEC
Geoffrey Brown
fuse1@nsf.gov (703) 292-4979 TIP/ITE
Z. C. Ying
fuse1@nsf.gov (703) 292-8428 MPS/DMR
Sankar Basu
fuse1@nsf.gov (703) 292-7843 CISE/CCF
Erik Brunvand
fuse1@nsf.gov (703) 292-8950 CISE/CNS
Premjeet Chahal
fuse1@nsf.gov (703) 292-7264 ENG/ECCS
Rosa Lukaszew
fuse1@nsf.gov (703) 292-8103 ENG/ECCS
Birgit Schwenzer
fuse1@nsf.gov (703) 292-4771 MPS/DMR
George M. Janini
fuse1@nsf.gov (703) 292-4971
Vinod K. Lohani
fuse1@nsf.gov (703) 292-2330 EDU/DGE
Eleanor Sayre
fuse1@nsf.gov (703) 292-2997 EDU/DUE

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